H8SSLASH2224 datasheet(622/1071 Pages) RENESAS

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Section 14 IEBus™ Controller (IEB) [H8S/2258 Group]

Rev. 5.00 Aug 08, 2006 page 536 of 982

REJ09B0054-0500

Dn-1

IECTR

CMX

MRQ

SRQ

SRE

RxRDY

RxS

RxF

IERxI (RxRDY)

(TO DTC)

IERxI (RxRDY)

(TO CPU)

IERSI

(TO CPU)

IECMR

IEFLG

IERSR

Interrupt

(1)

(2)

(3)

(4)

(9)

(5)

(6)

(7)

(5)

(6)

(7)

(8)

(9)

Slave reception

Master reception

H: Header, MA: Master address field, SA: Slave address field,

CF: Control field, LF: Message length field, D1, D2,..., Dn-1, Dn: Data field

DTC transfer

of 1st byte

Master reception request

DTC transfer

of (n-2)th byte

DTC transfer

of (n-1)th byte

DTC transfer

of nth byte

Figure 14.11 Master Receive Operation Timing

14.4.4

Slave Transmission

This section shows an example of performing a slave transmission using the DTC after slave

reception.

(1) IEB Initialization

(a) Setting the IEBus Control Register (IECTR)

Enable the IEBus pins, select the signal polarity, and select a clock supplied to the IEB. Clear

the LUEE bit to 0 because transfer by the DTC is performed.

(b) Setting the IEBus Master Unit Address Registers 1 and 2 (IEAR1 and IEAR2)

Specify the master unit address and specify the communications mode in IEAR1. Compare

with the slave address in the communications frame and receive the frame if matched.

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