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H8S/2224 Scheda tecnica(PDF) 708 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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H8S/2224 Scheda tecnica(HTML) 708 Page - Renesas Technology Corp

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Section 15 Serial Communication Interface (SCI)
Rev. 5.00 Aug 08, 2006 page 622 of 982
REJ09B0054-0500
15.9
Interrupt Sources
15.9.1
Interrupts in Normal Serial Communication Interface Mode
Table 15.12 shows the interrupt sources in normal serial communication interface mode. A
different interrupt vector is assigned to each interrupt source, and individual interrupt sources can
be enabled or disabled using the enable bits in SCR.
When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag
in SSR is set to 1, a TEI interrupt request is generated.
A TXI interrupt can activate the DTC to perform data transfer. The TDRE flag is cleared to 0
automatically when data is transferred by the DMAC*1 or the DTC*2.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,
PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated.
An RXI interrupt request can activate the DMAC*1 or the DTC*2 to transfer data. The RDRF flag
is cleared to 0 automatically when data is transferred by the DMAC*1 or the DTC*2.
A TEI interrupt is requested when the TEND flag is set to 1 and the TEIE bit is set to 1. If a TEI
interrupt and a TXI interrupt are requested simultaneously, the TXI interrupt has priority for
acceptance. However, if the TDRE and TEND flags are cleared simultaneously by the TXI
interrupt routine, the SCI cannot branch to the TEI interrupt routine later.
Notes: 1. Supported only by the H8S/2239 Group.
2. The flag is cleared only when DISEL in DTC is 0 with the transfer counter not being 0.



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