H8SSLASH2224 datasheet(784/1071 Pages) RENESAS

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Section 17 A/D Converter

Rev. 5.00 Aug 08, 2006 page 698 of 982

REJ09B0054-0500

ADIE

ADST

ADF

State of channel 0 (AN0)

A/D conversion result 2

A/D

conversion start

A/D conversion result 1

ADDRA

ADDRB

ADDRC

ADDRD

State of channel 1 (AN1)

State of channel 2 (AN2)

State of channel 3 (AN3)

Note: *

A/D conversion 1

Set*

Clear*

Idle

A/D conversion 2

Idle

Read conversion result*

Vertical arrows indicate instructions executed by software.

Figure 17.3 Example of A/D converter Operation (Single Mode, Channel 1 Selected)

17.5.2

Scan Mode

In scan mode, A/D conversion is to be performed sequentially on the specified channels (four

channels maximum). The operations are as follows.

1. When the ADST bit is set to 1 by software, TPU, timer conversion start trigger, or external

trigger, input, A/D conversion starts on the first channel in the group (AN0 when CH2 = 0,

AN4 when CH2 = 1).

2. When A/D conversion for each channel is completed, the result is sequentially transferred to

the A/D data register corresponding to each channel.

3. When conversion of all the selected channels is completed, the ADF flag is set to 1. If the

ADIE bit is set to 1 at this time, an ADI interrupt is requested after A/D conversion ends.

Conversion of the first channel in the group starts again.

4. Steps 2 to 3 are repeated as long as the ADST bit remains set to 1. When the ADST bit is

cleared to 0, A/D conversion stops and the A/D converter enters the wait state.

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