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H8S/2224 Scheda tecnica(PDF) 783 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 783 Page - Renesas Technology Corp |
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783 / 1071 page ![]() Section 17 A/D Converter Rev. 5.00 Aug 08, 2006 page 697 of 982 REJ09B0054-0500 17.5 Operation The A/D converter operates by successive approximation with 10-bit resolution. It has two operating modes; single mode and scan mode. When changing the operating mode or analog input channel, in order to prevent incorrect operation, first clear the bit ADST to 0 in ADCSR. The ADST bit can be set at the same time as the operating mode or analog input channel is changed. 17.5.1 Single Mode In single mode, A/D conversion is to be performed only once on the specified single channel. The operations are as follows. 1. A/D conversion is started when the ADST bit is set to 1, according to software, timer conversion start trigger, or external trigger input. 2. When A/D conversion is completed, the result is transferred to the corresponding A/D data register to the channel. 3. On completion of conversion, the ADF bit in ADCSR is set to 1. If the ADIE bit is set to 1 at this time, an ADI interrupt request is generated. 4. The ADST bit remains set to 1 during A/D conversion. When A/D conversion ends, the ADST bit is automatically cleared to 0 and the A/D converter enters the wait state. |
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