H8SSLASH2224 datasheet(975/1071 Pages) RENESAS

975 / 1071 page

Section 27 Electrical Characteristics

Rev. 5.00 Aug 08, 2006 page 889 of 982

REJ09B0054-0500

Item

Symbol

Min

Typ

Max

Unit Test Conditions

VOL



0.4

IOL = 0.4 mA

Output low

voltage

All output

pins*



0.4

IOL = 0.8 mA

RES

| Iin |



1.0

µA

Input leakage

current

STBY, NMI,

MD2 to MD0,

FWE



1.0

µA

Vin =

0.5 to VCC – 0.5 V

Ports 4, 9



1.0

µA

Vin =

0.5 to AVCC – 0.5 V

Three-state

leakage

current

(off state)

Ports 1, 3, 7,

A to G

| ITSI |



1.0

µA

Vin =

0.5 to VCC – 0.5 V

Input pull-up

MOS current

Ports A to E

–IP



300

µA

Vin = 0 V

Notes: 1. If the A/D and D/A converters are not used, do not leave the AVCC, Vref , and AVSS pins

open. Apply a voltage between 2.0 V and 5.5 V to the AVCC and Vref pins by connecting

them to VCC, for instance. Set Vref ≤ AVCC.

2. P35/SCK1/SCL0 and P34/SDA0 are NMOS push-pull outputs.

In order to output a high level from SCL0 and SDA0 (ICE = 1), a pull-up resistance must

be connected externally.

The high level of P35/SCK1 and P34 (ICE = 0) is driven by NMOS.

In order to output a high level, a pull-up resistance must be connected externally.

3. This is the case when IICE = 0 and ICE = 0. Low-level output when the bus drive

function is selected will be determined in table 27.29.

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