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H8S/2224 Scheda tecnica(PDF) 992 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 992 Page - Renesas Technology Corp |
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992 / 1071 page ![]() Section 27 Electrical Characteristics Rev. 5.00 Aug 08, 2006 page 906 of 982 REJ09B0054-0500 Item Symbol Min Typ Max Unit Test Conditions Erasing Wait time after SWE1 bit clearing tcswe 100 100 µs Maximum number of erases* 1 *5 N 100 Times Notes: 1. Follow the program/erase algorithms when making the time settings. 2. Programming time per 128 bytes (Indicates the total time during which the P1 bit is set in flash memory control register 1 (FLMCR1). Does not include the program-verify time.) 3. Time to erase one block (Indicates the time during which the E1 bit is set in FLMCR1. Does not include the erase-verify time.) 4. Maximum programming time (t P(max) = Wait time after P1 bit setting (tsp) × maximum number of writes (N)) (tsp30 + tsp10) × 6 + (tsp200) × 994 5. For the maximum erase time (tE (max)), the following relationship applies between the wait time after E1 bit setting (z) and the maximum number of erases (N): tE (max) = Wait time after E1 bit setting (tse) × maximum number of erases (N) 6. The minimum times that all characteristics after rewriting are guaranteed. (A range between 1 and minimum value is guaranteed.) 7. The reference value at 25 °C. (Normally, it is a reference that rewriting is enabled up to this value.) 8. Data hold characteristics when rewriting is performed within the range of specifications including minimum value. |
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