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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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H8S/2224 Scheda tecnica(PDF) 164 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 164 Page - Renesas Technology Corp |
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164 / 1071 page  Section 2 CPU Rev. 5.00 Aug 08, 2006 page 78 of 982 REJ09B0054-0500 2.5.2 Memory Data Formats Figure 2.10 shows the data formats in memory. The H8S/2000 CPU can access word data and longword data in memory, but word or longword data must begin at an even address. If an attempt is made to access word or longword data at an odd address, no address error occurs but the least significant bit of the address is regarded as 0, so the access starts at the preceding address. This also applies to instruction fetches. When ER7 is used as an address register to access the stack, the operand size should be word or longword. 70 76 543210 MSB LSB MSB MSB LSB LSB Data Type Address 1-bit data Byte data Word data Address L Address L Address 2M Address 2M + 1 Longword data Address 2N Address 2N + 1 Address 2N + 2 Address 2N + 3 Data Format Figure 2.10 Memory Data Formats |
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