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H8S/2224 Scheda tecnica(PDF) 300 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 300 Page - Renesas Technology Corp |
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300 / 1071 page ![]() Section 8 DMA Controller (DMAC) Rev. 5.00 Aug 08, 2006 page 214 of 982 REJ09B0054-0500 Bit Bit Name Initial Value R/W Description 12 11 BLKDIR BLKE 0 0 R/W R/W Block Direction Block Enable These bits specify whether normal mode or block transfer mode is to be used for data transfer. If block transfer mode is specified, the BLKDIR bit specifies whether the source side or the destination side is to be the block area. ×0: Transfer in normal mode 01: Transfer in block transfer mode (destination side is block area) 11: Transfer in block transfer mode (source side is block area) 10 to 8 All 0 R/W Reserved These bits can be read from or written to. However, the write value should always be 0. Legend: ×: Don’t care |
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