TMS320VC5505 datasheet(32/135 Pages) TI

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TMS320VC5505

SPRS503B – JUNE 2009 – REVISED JANUARY 2010

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Table 3-18. GPIO Terminal Functions (continued)

SIGNAL

TYPE(1)

OTHER(2) (3)

DESCRIPTION

NAME

NO.

LCD_D[11]/

This pin is multiplexed between LCD Bridge, I2S2, GPIO, and SPI.

I2S2_DX/

IPD

For GPIO, it is general-purpose input/output pin 27 (GP[27]).

P12

I/O/Z

GP[27]/

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

SPI_TX

enabled or disabled via the PDINHIBR3 register.

LCD_D[12]/

This pin is multiplexed between LCD Bridge, UART, GPIO, and I2S3.

UART_RTS/

IPD

For GPIO, it is general-purpose input/output pin 28 (GP[28]).

N12

I/O/Z

GP[28]/

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

I2S3_CLK

enabled or disabled via the PDINHIBR3 register.

LCD_D[13]/

This pin is multiplexed between LCD Bridge, UART, GPIO, and I2S3.

UART_CTS/

IPD

For GPIO, it is general-purpose input/output pin 29 (GP[29]).

P13

I/O/Z

GP[29]/

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

I2S3_FS

enabled or disabled via the PDINHIBR3 register.

LCD_D[14]/

This pin is multiplexed between LCD Bridge, UART, GPIO, and I2S3.

UART_RXD/

IPD

For GPIO, it is general-purpose input/output pin 30 (GP[30]).

N13

I/O/Z

GP[30]/

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

I2S3_RX

enabled or disabled via the PDINHIBR3 register.

LCD_D[15]/

This pin is multiplexed between LCD Bridge, UART, GPIO, and I2S3.

UART_TXD/

IPD

For GPIO, it is general-purpose input/output pin 31 (GP[31]).

P14

I/O/Z

GP[31]/

DVDDIO

Mux control via the PPMODE bits in the EBSR. The IPD resistor on this pin can be

I2S3_DX

enabled or disabled via the PDINHIBR3 register.

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