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TMS320VC5505 Scheda tecnica(PDF) 69 Page - Texas Instruments

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Il numero della parte TMS320VC5505
Spiegazioni elettronici  Fixed-Point Digital Signal Processor
PDF  135 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

TMS320VC5505 Scheda tecnica(HTML) 69 Page - Texas Instruments

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LOW Group
HIGHGroup
Z Group
RESET
SYNCH X
0
→
Group
SYNCH X
1
→
Group
SYNCH 0
1
→
Group
SYNCH 1
0
→
Group
64k + 8 clocks if CLK_SEL = 1,
32 + 8 clocks if CLK_SEL = 0
CLKOUT
POWERGOOD
(Internal)
POWERGOOD
(Internal)
and RESET
TMS320VC5505
www.ti.com
SPRS503B – JUNE 2009 – REVISED JANUARY 2010
6.7.3
Reset Electrical Data/Timing
Table 6-6. Timing Requirements for Reset(1) (see Figure 6-9 and Figure 6-10)
CVDD = 1.05 V
CVDD = 1.3 V
NO.
UNIT
MIN
MAX
MIN
MAX
1
tw(RSTL)
Pulse duration, RESET low
3P
3P
ns
(1)
(1)P = 1/SYSCLK clock frequency in ns. For example, if SYSCLK = 12 MHz, use P = 83.3 ns. In IDLE3 mode the system clock
generator is bypassed and the SYSCLK frequency is equal to either CLKIN or the RTC clock frequency depending on CLK_SEL.
Figure 6-9. Power-On Reset Timing Requirements
Copyright © 2009–2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
69
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