CDPCLK4 datasheet(256/274 Pages) ALTERA

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11–4

Chapter 11: SEU Mitigation in the Cyclone III Device Family

Error Detection Block

Cyclone III Device Handbook

December 2011

Altera Corporation

Volume 1

Table 11–2 lists the CRC_ERROR pin.

f For more information about the CRC_ERROR pin information for Cyclone III device

family, refer to the Cyclone III Pin-Out Files for Altera Devices page on the Altera®

website.

1 WYSIWYG is an optimization technique that performs optimization on VQM (Verilog

Quartus Mapping) netlist in the Quartus II software.

Error Detection Block

Table 11–3 lists the types of CRC detection to check the configuration bits.

This section focuses on the first type—the 32-bit CRC when the device is in user

mode.

Error Detection Registers

There are two sets of 32-bit registers in the error detection circuitry that store the

computed CRC signature and pre-calculated CRC value. A non-zero value on the

signature register causes the CRC_ERROR pin to set high.

Table 11–2. CRC_ERROR Pin Description

Device

CRC_ERROR

Pin Type

Description

Cyclone III

Dedicated

Output or

Open Drain

Output

(Optional)

By default, the Quartus II software sets the CRC_ERROR pin as a dedicated output. If the

CRC_ERROR

pin is used as a dedicated output, you must ensure that the VCCIO of the bank in

which the pin resides meets the input voltage specification of the system receiving the signal.

Optionally, you can set this pin to be an open-drain output by enabling the option in the

Quartus II software from the Error Detection CRC tab of the Device and Pin Options dialog

box. Using the pin as an open-drain provides an advantage on the voltage leveling. To use this

pin as open-drain, you can tie this pin to VCCIO of Bank 1 through a 10-k pull-resistor.

Alternatively, depending on the voltage input specification of the system receiving the signal,

you can tie the pull-up resistor to a different pull-up voltage.

Cyclone III LS

Open Drain

Output

To use the CRC_ERROR pin, you can either tie this pin to VCCIO through a 10-kpull-up

resistor, or depending on input voltage specification of the system receiving the signal, you

can tie this pin to a different pull-up voltage.

Table 11–3. Types of CRC Detection to Check the Configuration Bits

First Type of CRC Detection

Second Type of CRC Detection

■ CRAM error checking ability (32-bit CRC)

during user mode, for use by the

CRC_ERROR

pin.

■ There is only one 32-bit CRC value, and

this value covers all the CRAM data.

■ 16-bit CRC embedded in every configuration data frame.

■ During configuration, after a frame of data is loaded into the device, the

pre-computed CRC is shifted into the CRC circuitry.

■ Simultaneously, the CRC value for the data frame shifted-in is calculated.

If the pre-computed CRC and calculated CRC values do not match,

nSTATUS

is set low.

■ Every data frame has a 16-bit CRC. Therefore, there are many 16-bit CRC

values for the whole configuration bit stream.

■ Every device has a different length of configuration data frame.

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