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FS23 Scheda tecnica(PDF) 169 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 169 Page - NXP Semiconductors |
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169 / 230 page  NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Bit Symbol Description Configure RSTB reaction when LIMP0 is detected shorted to high 0 No action 1 LIMP0 assertion 11 LIMP0_SC_RSTB_IMPACT POR Configure RSTB pulse duration 0 10 ms 1 1 ms 12 RSTB_DUR OTP fuse load Disable the RSTB low 8s timer 0 RSTB low 8 s timer is enabled 1 RSTB low 8 s time is disabled 13 RSTB8S_DIS OTP fuse load Disable the external RSTB monitoring (except RSTB8s time out) 0 External RSTB monitoring is enabled 1 External RSTB monitoring is disabled 14 EXT_RSTB_DIS POR Table 170. FS_I_FSSM_CFG register bit description...continued 22.49 FS_I_WD_CFG Bit 15 14 13 12 11 10 9 8 Write - WD_RSTB_ IMPACT WD_FS0 B_IMPACT WD_LIMP0_ IMPACT WD_DIS_ LPON WD_RFR_LIMIT WD_ERR_ LIMIT Read 0 WD_RSTB_ IMPACT WD_FS0 B_IMPACT WD_LIMP0_ IMPACT WD_DIS_ LPON WD_RFR_LIMIT WD_ERR_ LIMIT Reset 0 1 1 1 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write WD_ERR_LIMIT - - - - - - - Read WD_ERR_LIMIT WD_RFR_CNT WD_ERR_CNT Reset 1 0 0 0 0 0 0 0 Table 171. FS_I_WD_CFG register bit allocation Bit Symbol Description Reflect the value of the watchdog error counter 0000 0 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 0 to 3 WD_ERR_CNT POR Table 172. FS_I_WD_CFG register bit description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 169 / 230 |
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