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FS23 Scheda tecnica(PDF) 170 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 170 Page - NXP Semiconductors |
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170 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Bit Symbol Description Reflect the value of the watchdog refresh counter 000 0 001 1 010 2 011 3 100 4 101 5 110 6 111 6 4 to 6 WD_RFR_CNT POR Configure the watchdog error counter limit 00 8 01 6 10 4 11 2 7 to 8 WD_ERR_LIMIT POR Configure the watchdog refresh counter limit 00 6 01 4 10 2 11 1 9 to 10 WD_RFR_LIMIT POR Automatically disable the watchdog in LPON mode (when GO2LPON) 0 WD stays enabled in LPON 1 WD is disabled in LPON 11 WD_DIS_LPON POR Configure watchdog error impact on LIMP0 0 No effect 1 LIMP0 assertion 12 WD_LIMP0_IMPACT POR Configure watchdog error impact on FS0B 0 No effect 1 FS0B assertion 13 WD_FS0B_IMPACT POR Configure watchdog error impact on RSTB 0 No effect 1 RSTB assertion 14 WD_RSTB_IMPACT POR Table 172. FS_I_WD_CFG register bit description...continued FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 170 / 230 |
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