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FS23 Scheda tecnica(PDF) 107 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 107 Page - NXP Semiconductors |
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107 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers 21 SPI/I2C register mapping Address Register # Adr_6 Adr_5 Adr_4 Adr_3 Adr_2 Adr_1 Adr_0 Read/Write Reference M_DEV_CFG 0 0 0 0 0 0 0 0 Read only Section 22.1 M_DEV_PROG_ID 1 0 0 0 0 0 0 1 Read only Section 22.2 M_GEN_FLAG 2 0 0 0 0 0 1 0 Read only Section 22.3 M_STATUS 3 0 0 0 0 0 1 1 Read only Section 22.4 Reserved 4 0 0 0 0 1 0 0 Reserved - M_SYS_CFG 5 0 0 0 0 1 0 1 Read/Write Section 22.5 M_SYS1_CFG 6 0 0 0 0 1 1 0 Read/Write Section 22.6 M_REG_CTRL 7 0 0 0 0 1 1 1 Read/Write Section 22.7 Reserved 8 0 0 0 1 0 0 0 Reserved - Reserved 9 0 0 0 1 0 0 1 Reserved - M_REG_FLG 10 0 0 0 1 0 1 0 Read/Write Section 22.8 M_REG_MSK 11 0 0 0 1 0 1 1 Read/Write Section 22.9 M_REG1_FLG 12 0 0 0 1 1 0 0 Read/Write Section 22.10 M_REG1_MSK 13 0 0 0 1 1 0 1 Read/Write Section 22.11 M_IO_CTRL 14 0 0 0 1 1 1 0 Write only Section 22.12 M_IO_TIMER_FLG 15 0 0 0 1 1 1 1 Read/Write Section 22.13 M_IO_TIMER_MSK 16 0 0 1 0 0 0 0 Read/Write Section 22.14 M_VSUP_COM_FLG 17 0 0 1 0 0 0 1 Read/Write Section 22.15 M_VSUP_COM_MSK 18 0 0 1 0 0 1 0 Read/Write Section 22.16 M_IOWU_CFG 19 0 0 1 0 0 1 1 Read/Write Section 22.17 M_IOWU_EN 20 0 0 1 0 1 0 0 Read/Write Section 22.18 M_IOWU_FLG 21 0 0 1 0 1 0 1 Read/Write Section 22.19 M_WU1_EN 22 0 0 1 0 1 1 0 Read/Write Section 22.20 M_WU1_FLG 23 0 0 1 0 1 1 1 Read/Write Section 22.21 M_TIMER1_CFG 24 0 0 1 1 0 0 0 Read/Write Section 22.22 M_TIMER2_CFG 25 0 0 1 1 0 0 1 Read/Write Section 22.23 M_TIMER3_CFG 26 0 0 1 1 0 1 0 Read/Write Section 22.24 M_PWM1_CFG 27 0 0 1 1 0 1 1 Read/Write Section 22.25 M_PWM2_CFG 28 0 0 1 1 1 0 0 Read/Write Section 22.26 M_PWM3_CFG 29 0 0 1 1 1 0 1 Read/Write Section 22.27 M_TIMER_PWM_CTRL 30 0 0 1 1 1 1 0 Read/Write Section 22.28 M_CS_CFG 31 0 0 1 1 1 1 1 Read/Write Section 22.29 M_CS_FLG_MSK 32 0 1 0 0 0 0 0 Read/Write Section 22.30 Table 72. Main register mapping FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 107 / 230 |
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