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FS23 Scheda tecnica(PDF) 110 Page - NXP Semiconductors

Il numero della parte FS23
Spiegazioni elettronici  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS23 Scheda tecnica(HTML) 110 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
LOGIC
REGISTER
NAME
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
value
M_IOWU_
FLG
LVI5_WU_I
LVIO4_
WU_I
LVIO3_
WU_I
0
HVIO2_
CYS_RDY
HVIO1_
CYS_RDY
HVIO2_
CYC_S
HVIO1_
CYC_S
HVIO2_
WU_I
HVIO1_
WU_I
WK2_
CYS_RDY
WK1_
CYS_RDY
WK2_
CYC_S
WK1_
CYC_S
WK2_WU_I WK1_WU_I
0x0000
M_WU1_
EN
0
0
0
0
0
0
0
0
0
0
LDT_WUEN
LIN_WUEN
CAN_WUEN
0x000F
M_WU1_
FLG
0
0
0
0
0
0
FS_EVT
EXT_
RSTB_WU
WD_
OFL_WU
V1_
UVLP_WU
INT_
TO_WU
GO2
NORMAL_
WU
0
LDT_WU_I
LIN_WU_I
CAN_WU_I
0x0000
M_
TIMER1_
CFG
0
0
0
0
0
0
0
TIMER1_DLY
TIMER1_ON
TIMER1_PER
0x0000
M_
TIMER2_
CFG
0
0
0
0
0
0
0
TIMER2_DLY
TIMER2_ON
TIMER2_PER
0x0000
M_
TIMER3_
CFG
0
0
0
0
0
0
0
TIMER3_DLY
TIMER3_ON
TIMER3_PER
0x0000
M_PWM1_
CFG
0
0
0
PWM1_DLY
PWM1_F
PWM1_DC
0x0000
M_PWM2_
CFG
0
0
0
PWM2_DLY
PWM2_F
PWM2_DC
0x0000
M_PWM3_
CFG
0
0
0
PWM3_DLY
PWM3_F
PWM3_DC
0x0000
M_TIMER_
PWM_
CTRL
0
0
0
0
0
0
0
0
0
TIM1_EN
TIM2_EN
TIM3_EN
0
PWM1_EN
PWM2_EN
PWM3_EN
0x0000
M_CS_
CFG
0
0
0
0
0
0
HS_FLT_
WU_
FORCE
0
HVIO2_HS_SEL
HVIO1_HS_SEL
WK2_HS_SEL
WK1_HS_SEL
0x0000
M_CS_
FLG_MSK
0
0
0
0
0
0
0
HVIO2_
OL_M
HVIO1_
OL_M
WAKE2_
OL_M
WAKE1_
OL_M
0
HVIO2_
OL_I
HVIO1_
OL_I
WAKE2_
OL_I
WAKE1_
OL_I
0x0000
M_HSx_
SRC_CFG
HS4_SRC_SEL
HS3_SRC_SEL
HS2_SRC_SEL
HS1_SRC_SEL
0x0000
M_HSx_
CTRL
0
HS_
VSHSUVOV_
REC
HS_
VSHSUV_
DIS
HS_
VSHSOV_
DIS
0
0
0
0
0
HS4_EN
0
HS3_EN
0
HS2_EN
0
HS1_EN
0x0000
M_HSx_
FLG
0
0
0
HS4_OL_I
HS4_OC_I
0
HS3_OL_I
HS3_OC_I
HS34_
TSD_I
0
HS2_OL_I
HS2_OC_I
0
HS1_OL_I
HS1_OC_I
HS12_
TSD_I
0x0000
M_HSx_
MSK
0
0
0
HS4_OL_M HS4_OC_M
0
HS3_OL_M HS3_OC_M
HS34_
TSD_M
0
HS2_OL_M HS2_OC_M
0
HS1_OL_M HS1_OC_M
HS12_
TSD_M
0x0000
M_AMUX_
CTRL
0
0
0
0
0
0
AMUX_EN AMUX_DIV
0
0
0
AMUX
0x0000
M_LDT_
CFG1
LDT_AFTER_RUN
0x0000
M_LDT_
CFG2
LDT_WUP_L
0x0000
M_LDT_
CFG3
0
0
0
0
0
0
0
0
LDT_WUP_H
0x0000
Table 74. Register map overview...continued
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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