H8SSLASH2214 datasheet(443/936 Pages) RENESAS

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Section 10 16-Bit Timer Pulse Unit (TPU)

Rev.4.00 Sep. 18, 2008 Page 383 of 872

REJ09B0189-0400

Bit 3—Input Capture/Output Compare Flag D (TGFD): Status flag that indicates the

occurrence of TGRD input capture or compare match in channel 0.

In channels 1 and 2, bit 3 is reserved. It is always read as 0 and cannot be modified.

Bit 3

TGFD

Description

[Clearing conditions]

(Initial value)

• When DTC is activated by a TGID interrupt, the DTC module MRB register DISEL

bit is 0, and furthermore the transfer counter is not 0.

• When 0 is written to TGFD after reading TGFD = 1

[Setting conditions]

• When TCNT = TGRD while TGRD is functioning as output compare register

• When TCNT value is transferred to TGRD by input capture signal while TGRD is

functioning as input capture register

Bit 2—Input Capture/Output Compare Flag C (TGFC): Status flag that indicates the

occurrence of TGRC input capture or compare match in channel 0.

In channels 1and 2, bit 2 is reserved. It is always read as 0 and cannot be modified.

Bit 2

TGFC

Description

[Clearing conditions]

(Initial value)

• When DTC is activated by a TGIC interrupt, the DTC module MRB register DISEL

bit is 0, and furthermore the transfer counter is not 0.

• When 0 is written to TGFC after reading TGFC = 1

[Setting conditions]

• When TCNT = TGRC while TGRC is functioning as output compare register

• When TCNT value is transferred to TGRC by input capture signal while TGRC is

functioning as input capture register

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