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H8S/2214 Scheda tecnica(PDF) 579 Page - Renesas Technology Corp

Il numero della parte H8S/2214
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
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Section 12 Serial Communication Interface (SCI)
Rev.4.00 Sep. 18, 2008 Page 519 of 872
REJ09B0189-0400
Table 12.13 SCI Interrupt Sources
Channel
Interrupt
Source
Description
DMAC
Activation
DTC
Activation
Priority*
0
ERI
Interrupt due to receive error
(ORER, FER, or PER)
Not possible
Not possible
High
RXI
Interrupt due to receive data full
state (RDRF)
Possible
Possible
TXI
Interrupt due to transmit data
empty state (TDRE)
Possible
Possible
TEI
Interrupt due to transmission
end (TEND)
Not possible
Not possible
1
ERI
Interrupt due to receive error
(ORER, FER, or PER)
Not possible
Not possible
RXI
Interrupt due to receive data full
state (RDRF)
Possible
Possible
TXI
Interrupt due to transmit data
empty state (TDRE)
Possible
Possible
TEI
Interrupt due to transmission
end (TEND)
Not possible
Not possible
2
ERI
Interrupt due to receive error
(ORER, FER, or PER)
Not possible
Not possible
RXI
Interrupt due to receive data full
state (RDRF)
Possible
Not possible
TXI
Interrupt due to transmit data
empty state (TDRE)
Possible
Not possible
TEI
Interrupt due to transmission
end (TEND)
Not possible
Not possible
Low
Note: * This table shows the initial state immediately after a reset. Relative priorities among
channels can be changed by means of the interrupt controller.
A TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. The
TEND flag is cleared at the same time as the TDRE flag. Consequently, if a TEI interrupt and a
TXI interrupt are requested simultaneously, the TXI interrupt may have priority for acceptance,
with the result that the TDRE and TEND flags are cleared. Note that the TEI interrupt will not be
accepted in this case.



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