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H8S/2214 Scheda tecnica(PDF) 580 Page - Renesas Technology Corp

Il numero della parte H8S/2214
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2214 Scheda tecnica(HTML) 580 Page - Renesas Technology Corp

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Section 12 Serial Communication Interface (SCI)
Rev.4.00 Sep. 18, 2008 Page 520 of 872
REJ09B0189-0400
12.5
Usage Notes
The following points should be noted when using the SCI.
(1) Module Stop Mode Settings
The SCI module operation disabled/enabled state can be set with the module stop control register.
The initial value of this register sets the SCI module to the stopped state. Register access becomes
possible when module stop mode is cleared. See section 17, Power-Down Modes, for details.
(2) Relation between Writes to TDR and the TDRE Flag
The TDRE flag in SSR is a status flag that indicates that transmit data has been transferred from
TDR to TSR. When the SCI transfers data from TDR to TSR, the TDRE flag is set to 1.
Data can be written to TDR regardless of the state of the TDRE flag. However, if new data is
written to TDR when the TDRE flag is cleared to 0, the data stored in TDR will be lost since it has
not yet been transferred to TSR. It is therefore essential to check that the TDRE flag is set to 1
before writing transmit data to TDR.
(3) Operation when Multiple Receive Errors Occur Simultaneously
If a number of receive errors occur at the same time, the state of the status flags in SSR is as
shown in table 12.14. If there is an overrun error, data is not transferred from RSR to RDR, and
the receive data is lost.



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