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H8S/2214 Scheda tecnica(PDF) 582 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 582 Page - Renesas Technology Corp |
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582 / 936 page ![]() Section 12 Serial Communication Interface (SCI) Rev.4.00 Sep. 18, 2008 Page 522 of 872 REJ09B0189-0400 (6) Receive Error Flags and Transmit Operations (Clocked Synchronous Mode Only) Transmission cannot be started when a receive error flag (ORER, PER, or FER) is set to 1, even if the TDRE flag is cleared to 0. Be sure to clear the receive error flags to 0 before starting transmission. Note also that receive error flags cannot be cleared to 0 even if the RE bit is cleared to 0. (7) Receive Data Sampling Timing and Reception Margin in Asynchronous Mode In asynchronous mode, the SCI operates on a basic clock with a frequency of 16 times the transfer rate. In reception, the SCI samples the falling edge of the start bit using the basic clock, and performs internal synchronization. Receive data is latched internally at the rising edge of the 8th pulse of the basic clock. This is illustrated in figure 12.26. Internal basic clock 16 clocks 8 clocks Receive data (RxD) Synchronization sampling timing Start bit D0 D1 Data sampling timing 15 0 7 15 0 07 Figure 12.26 Receive Data Sampling Timing in Asynchronous Mode |
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