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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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H8S/2214 Scheda tecnica(PDF) 604 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 604 Page - Renesas Technology Corp |
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604 / 936 page  Section 15 ROM Rev.4.00 Sep. 18, 2008 Page 544 of 872 REJ09B0189-0400 15.1.2 Register Configuration The H8S/2214’s on-chip ROM is controlled by the mode pins. The register configuration is shown in table 15.1. Table 15.1 ROM Register Name Abbreviation R/W Initial Value Address* Mode control register MDCR R/W Undefined H'FDE7 Note: * Lower 16 bits of the address. 15.2 Register Descriptions 15.2.1 Mode Control Register (MDCR) Bit : 7 6 5 4 3 2 1 0 — — — — — MDS2 MDS1 MDS0 Initial value : 1 0 0 0 0 —* —* —* R/W : — — — — — R R R Note: * Determined by pins MD2 to MD0. MDCR is an 8-bit read-only register that indicates the current operating mode of the H8S/2214 Group. Bit 7—Reserved: Read-only bit, always read as 1. Bits 6 to 3—Reserved: Read-only bits, always read as 0. Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins MD2 to MD0 (the current operating mode). Bits MDS2 to MDS0 correspond to pins MD2 to MD0. MDS2 to MDS0 are read-only bits, and cannot be written to. The mode pin (MD2 to MD0) input levels are latched into these bits when MDCR is read. These latches are canceled by a power-on reset, but are retained after a manual reset. |
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