H8SSLASH2214 datasheet(624/936 Pages) RENESAS

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Section 15 ROM

Rev.4.00 Sep. 18, 2008 Page 564 of 872

REJ09B0189-0400

15.8

On-Board Programming Modes

When pins are set to on-board programming mode and a reset-start is executed, a transition is

made to the on-board programming state in which program/erase/verify operations can be

performed on the on-chip flash memory. There are two on-board programming modes: boot mode

and user program mode. The pin settings for transition to each of these modes are shown in table

15.8. For a diagram of the transitions to the various flash memory modes, see figure 15.3.

Table 15.8

Setting On-Board Programming Modes

Mode

FWE

MD2

MD1

MD0

Boot mode

Expanded mode

Single-chip mode

User program mode

Expanded mode

Single-chip mode

15.8.1

Boot Mode

When boot mode is used, the flash memory programming control program must be prepared in the

host beforehand. The SCI channel to be used is set to asynchronous mode.

When a reset-start is executed after the LSI’s pins have been set to boot mode, the boot program

built into the LSI is started and the programming control program prepared in the host is serially

transmitted to the LSI via the SCI. In the LSI, the programming control program received via the

SCI is written into the programming control program area in on-chip RAM. After the transfer is

completed, control branches to the start address of the programming control program area and the

programming control program execution state is entered (flash memory programming is

performed).

The transferred programming control program must therefore include coding that follows the

programming algorithm given later.

If a memory cell does not operate normally and cannot be erased, one H'FF byte is transmitted as

an erase error indication, and the erase operation and subsequent operations are halted. When a

transition is made to boot mode, or from boot mode to another mode, mode switching must be

carried out by means of

RES input. The states of ports with multiplexed address functions and bus

control output signals (

AS, RD, WR) change during the switchover period (while a low level is

being input at the

RES pin), and therefore these pins should not be used for output signals during

this period.

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