H8SSLASH2214 datasheet(627/936 Pages) RENESAS

627 / 936 page

Section 15 ROM

Rev.4.00 Sep. 18, 2008 Page 567 of 872

REJ09B0189-0400

(1) Automatic SCI Bit Rate Adjustment

Start

bit

Stop

bit

Low period (9 bits) measured (H'00 data)

High period

(1 or more bits)

Figure 15.11 Automatic SCI Bit Rate Adjustment

When boot mode is initiated, the LSI measures the low period of the asynchronous SCI

communication data (H'00) transmitted continuously from the host. The SCI transmit/receive

format should be set as follows: 8-bit data, 1 stop bit, no parity. The LSI calculates the bit rate of

the transmission from the host from the measured low period, and transmits one H'00 byte to the

host to indicate the end of bit rate adjustment. The host should confirm that this adjustment end

indication (H'00) has been received normally, and transmit one H'55 byte to the LSI. If reception

cannot be performed normally, initiate boot mode again (reset), and repeat the above operations.

Depending on the host’s transmission bit rate and the LSI’s system clock frequency, there will be

a discrepancy between the bit rates of the host and the LSI. Set the host transfer bit rate at 4,800,

9,600, or 19,200 bps to operate the SCI properly.

Table 15.9 shows host transfer bit rates and system clock frequencies for which automatic

adjustment of the LSI bit rate is possible. The boot program should be executed within this system

clock range.

Table 15.9

System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate Is

Possible

Host Bit Rate

System Clock Frequency for Which Automatic Adjustment

of LSI Bit Rate is Possible

4,800 bps

2 MHz to 16 MHz

9,600 bps

4 MHz to 16 MHz

19,200 bps

8 MHz to 16 MHz

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