H8SSLASH2214 datasheet(816/936 Pages) RENESAS

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Appendix B Internal I/O Register

Rev.4.00 Sep. 18, 2008 Page 756 of 872

REJ09B0189-0400

IER—IRQ Enable Register

H'FE14

Interrupt Controller

IRQ7E

R/W

IRQ6E

R/W

IRQ5E

R/W

IRQ4E

R/W

IRQ3E

R/W

IRQ0E

R/W

IRQ2E

R/W

IRQ1E

R/W

Bit

Initial value

R/W

IRQn Enable

IRQn interrupts disabled

IRQn interrupts enabled

(n = 7 to 0)

ISR—IRQ Status Register

H'FE15

Interrupt Controller

IRQ7F

R/(W)*

IRQ6F

R/(W)*

IRQ5F

R/(W)*

IRQ4F

R/(W)*

IRQ3F

R/(W)*

IRQ0F

R/(W)*

IRQ2F

R/(W)*

IRQ1F

R/(W)*

Bit

Initial value

R/W

Note: * Only 0 can be written, to clear the flag.

Indicates the status of IRQn interrupt requests

[Clearing conditions]

• Cleared by reading IRQnF flag when IRQnF = 1, then writing 0 to IRQnF flag

• When interrupt exception handling is executed when low-level detection is set

(IRQnSCB = IRQnSCA = 0) and

IRQn input is high

• When IRQn interrupt exception handling is executed when falling, rising, or

both-edge detection is set (IRQnSCB = 1 or IRQnSCA = 1)

• When the DTC is activated by an IRQn interrupt, and the DISEL bit in MRB

of the DTC is cleared to 0

[Setting conditions]

• When

IRQn input goes low when low-level detection is set

(IRQnSCB = IRQnSCA = 0)

• When a falling edge occurs in

IRQn input when falling edge detection is set

(IRQnSCB = 0, IRQnSCA = 1)

• When a rising edge occurs in

IRQn input when rising edge detection is set

(IRQnSCB = 1, IRQnSCA = 0)

• When a falling or rising edge occurs in

IRQn input when both-edge detection

is set (IRQnSCB = IRQnSCA = 1)

(n = 7 to 0)

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