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H8S/2214 Scheda tecnica(PDF) 842 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 842 Page - Renesas Technology Corp |
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842 / 936 page ![]() Appendix B Internal I/O Register Rev.4.00 Sep. 18, 2008 Page 782 of 872 REJ09B0189-0400 TIER0—Timer Interrupt Enable Register 0 H'FF14 TPU0 7 — 0 R/W 6 — 1 — 5 — 0 — 4 TCIEV 0 R/W 3 TGIED 0 R/W 0 TGIEA 0 R/W 2 TGIEC 0 R/W 1 TGIEB 0 R/W Bit Initial value R/W : : : TGR Interrupt Enable B TGR Interrupt Enable A 0 1 Interrupt requests (TGIB) by TGFB bit disabled Interrupt requests (TGIB) by TGFB bit enabled 0 1 Interrupt requests (TGIA) by TGFA bit disabled Interrupt requests (TGIA) by TGFA bit enabled TGR Interrupt Enable C 0 1 Interrupt requests (TGIC) by TGFC bit disabled Interrupt requests (TGIC) by TGFC bit enabled TGR Interrupt Enable D 0 1 Interrupt requests (TGID) by TGFD bit disabled Interrupt requests (TGID) by TGFD bit enabled Overflow Interrupt Enable 0 1 Interrupt requests (TCIV) by TCFV disabled Interrupt requests (TCIV) by TCFV enabled Reserved Only 0 should be written to this bit. |
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