H8SSLASH2214 datasheet(140/936 Pages) RENESAS

Il numero della parte	H8S/2214

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	936 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 4 Exception Handling

Rev.4.00 Sep. 18, 2008 Page 80 of 872

REJ09B0189-0400

4.1.2

Exception Handling Operation

Exceptions originate from various sources. Trap instructions and interrupts are handled as follows:

1. The program counter (PC), condition code register (CCR), and extended register (EXR) are

pushed onto the stack.

2. The interrupt mask bits are updated. The T bit is cleared to 0.

3. A vector address corresponding to the exception source is generated, and program execution

starts from that address.

For a reset exception, steps 2 and 3 above are carried out.

4.1.3

Exception Sources and Vector Table

The exception sources are classified as shown in figure 4.1. Different vector addresses are

assigned to different exception sources.

Table 4.2 lists the exception sources and their vector addresses.

Exception

sources

Reset

Trace

Direct transition

Interrupts

Trap instruction

Power-on reset

Manual reset

External interrupts: NMI, IRQ7 to IRQ0

External expansion interrupts: EXIRQ7 to EXIRQ0

Internal interrupts: 31 interrupt sources

Figure 4.1 Exception Sources

H8S/2214 Scheda tecnica(PDF) 140 Page - Renesas Technology Corp