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H8S/2214 Scheda tecnica(PDF) 138 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 138 Page - Renesas Technology Corp |
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138 / 936 page ![]() Section 3 MCU Operating Modes Rev.4.00 Sep. 18, 2008 Page 78 of 872 REJ09B0189-0400 External address space On-chip ROM On-chip RAM* Note: * External addresses can be accessed by clearing the RAME bit in SYSCR to 0. Internal I/O registers On-chip ROM External address space External address space On-chip RAM* Reserved area* Reserved area* On-chip RAM On-chip RAM* On-chip RAM* On-chip RAM Internal I/O registers Internal I/O registers Internal I/O registers Internal I/O registers External address space External address space Internal I/O registers External address space H'000000 H'000000 H'000000 H'020000 H'FFB000 H'FFC000 H'FFC000 H'FFEFC0 H'FFFFC0 H'FFB000 H'FFEFC0 H'FFFFC0 H'FFEFBF H'FFC000 H'FFFFC0 H'FFFFFF H'FFFFFF H'FFFFFF H'FFFF40 H'FFFF40 H'FFF800 H'FFFF3F H'FFFF60 H'FFFF60 H'FFFF60 H'FFF800 H'FFF800 H'01FFFF Modes 4 and 5 (advanced expanded modes with on-chip ROM disabled) Mode 6 (advanced expanded mode with on-chip ROM enabled) Mode 7 (advanced single-chip mode) Figure 3.1 Memory Map in Each Operating Mode in the H8S/2214 |
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