H8SSLASH2224 datasheet(411/1071 Pages) RENESAS

411 / 1071 page

Section 10 I/O Ports

Rev. 5.00 Aug 08, 2006 page 325 of 982

REJ09B0054-0500

• P74/TMO2/MRES

The pin functions are switched as shown below according to the combination of OS3 to OS0

bits in TCSR_2 of TMR_2*, the MRESE bit in SYSCR, and the P74DDR bit.

MRESE

OS3 to OS0*

All bits are 0

Any bit is 1



P74DDR



Pin functions

P74 input pin

P74 output pin

TMO2* output

MRES input

Note:

* Not available in the H8S/2237 Group and H8S/2227 Group.

• P73/TMO1/TEND1/CS7

The pin functions are switched as shown below according to the combination of operating

mode, the TEE1 bit in DMATCR of DMAC*, OS3 to OS0 bits in TCSR_1 of TMR_1, and the

P73DDR bit.

Operating

mode

Modes 4 to 6

Mode 7

TEE1*

OS3 to OS0

All bits are 0

Any bit

is 1



All bits are 0

Any bit

is 1



P73DDR



Pin functions

P73

input

CS7

output

TMO1

output

TEND1*

output

P73

input

P73

output

TMO1

output

TEND1*

output

Note:

* Supported only by the H8S/2239 Group.

• P72/TMO0/TEND0/CS6

The pin functions are switched as shown below according to the combination of operating

mode the TEE0 bit in DMATCR of DMAC*, OS3 to OS0 bits in TCSR_0 of TMR_0, and the

P72DDR bit.

Operating

mode

Modes 4 to 6

Mode 7

TEE0*

OS3 to OS0

All bits are 0

Any bit

is 1



All bits are 0

Any bit

is 1



P72DDR





Pin functions

P72

input

CS6

output

TMO0

output

TEND0*

output

P72

input

P72

output

TMO0

output

TEND0*

output

Note:

* Supported only by the H8S/2239 Group.

H8S/2224 Scheda tecnica(PDF) 411 Page - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 411 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL