H8SSLASH2224 datasheet(530/1071 Pages) RENESAS

530 / 1071 page

Section 12 8-Bit Timers

Rev. 5.00 Aug 08, 2006 page 444 of 982

REJ09B0054-0500

• Time constant register A_3 (TCORA_3)*

• Time constant register B_3 (TCORB_3)*

• Timer control register_3 (TCR_3)*

• Timer control/status register_3 (TCSR_3)*

Note: * Not available in the H8S/2237 Group and H8S/2227 Group.

12.3.1

Timer Counter (TCNT)

Each TCNT is an 8-bit up-counter. TCNT_0 and TCNT_1 (TCNT_2 and TCNT_3)* comprise a

single 16-bit register, so they can be accessed together by word access.

TCNT increments on pulses generated from an internal or external clock source. This clock source

is selected by clock select bits CKS2 to CKS0 in TCR. TCNT can be cleared by an external reset

input signal or compare-match signals A and B. Counter clear bits CCLR1 and CCLR0 in TCR

select the method of clearing.

When TCNT overflows from H'FF to H'00, the overflow flag (OVF) in TCSR is set to 1. The

initial value of TCNT is H'00.

Note: * Not available in the H8S/2237 Group and H8S/2227 Group.

12.3.2

Time Constant Register A (TCORA)

TCORA is an 8-bit readable/writable register. TCORA_0 and TCORA_1 (TCORA_2 and

TCORA_3)* comprise a single 16-bit register, so they can be accessed together by word access.

TCORA is continually compared with the value in TCNT. When a match is detected, the

corresponding compare-match flag A (CMFA) in TCSR is set. Note, however, that comparison is

disabled during the T2 state of a TCORA write cycle.

The timer output from the TMO pin can be freely controlled by the compare-match signal A and

the settings of output select bits OS1 and OS0 in TCSR.

The initial value of TCORA is H'FF.

Note: * Not available in the H8S/2237 Group and H8S/2227 Group.

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