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H8S/2224 Scheda tecnica(PDF) 636 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 636 Page - Renesas Technology Corp |
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636 / 1071 page ![]() Section 15 Serial Communication Interface (SCI) Rev. 5.00 Aug 08, 2006 page 550 of 982 REJ09B0054-0500 RxD0 TxD0 PG1/ IRQ7 SCK0 TEI TXI RXI ERI SCMR SSR SCR SMR SEMR BRR RDR TSR RSR TDR TIOCA1 TCLKA TIOCA2 TPU External clock Transmission/ reception control Baud rate generator Module data bus Parity generation Internal data bus Clock φ φ/4 φ/16 φ/64 RSR: RDR: TSR: TDR: SMR: Receive shift register Receive data register Transmit shift register Transmit data register Serial mode register SCR: SSR: SCMR: BRR: SEMR: Serial control register Serial status register Smart card mode register Bit rate register Serial expansion mode register Legend: Parity check 10.667-MHz operation 115.152 kbps 460.606 kbps 16-MHz operation 115.196 kbps 460.784 kbps 720 kbps Average transfer rate generator C/ A CKE1 SSE Figure 15.2 Block Diagram of SCI_0 of H8S/2239 Group |
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