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H8S/2224 Scheda tecnica(PDF) 729 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 729 Page - Renesas Technology Corp |
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729 / 1071 page ![]() Section 16 I 2C Bus Interface (IIC) (Option) Rev. 5.00 Aug 08, 2006 page 643 of 982 REJ09B0054-0500 16.3.5 Serial Control Register X (SCRX) SCRX controls the IIC operating modes. Bit Bit Name Initial Value R/W Description 7 0R/W Reserved The initial value should not be changed. 6 5 IICX1 IICX0 0 0 R/W R/W I 2C Transfer Rate Select 1 and 0 Selects the transfer rate in master mode, together with bits CKS2 to CKS0 in ICMR. Refer to table 16.3. IICX1 controls IIC_1 and IICX0 controls IIC_0. 4 IICE 0 R/W I 2C Master Enable Controls CPU access to the IIC data register and control registers (ICCR, ICSR, ICDR/SARX, and ICMR/SAR). 0: CPU access to the IIC data register and control registers is disabled. 1: CPU access to the IIC data register and control registers is enabled. 3 FLSHE 0 R/W For details on this bit, refer to section 20.5.7, Serial Control Register X (SCRX). 2 to 0 All 0 R/W Reserved The initial value should not be changed. |
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