H8SSLASH2224 datasheet(852/1071 Pages) RENESAS

Il numero della parte	H8S/2224

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	1071 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 23 Clock Pulse Generator

Rev. 5.00 Aug 08, 2006 page 766 of 982

REJ09B0054-0500

23.1

The on-chip clock pulse generator has the following registers.

• System clock control register (SCKCR)

• Low-power control register (LPWRCR)

23.1.1

System Clock Control Register (SCKCR)

SCKCR performs medium-speed mode control.

Bit

Bit Name

Initial Value

R/W

Description

PSTOP

R/W

φ Clock Output Prohibited

Controls

φ output.

• High-speed mode, medium-speed mode,

subactive mode, sleep mode, and subsleep

mode

φ output

1: Fixed to high

• Software standby mode, watch mode, and direct

transition

0: Fixed to high

1: Fixed to high

• Hardware standby mode

0: High impedance

1: High impedance

6—

R/W

Reserved

This bit is readable/writable, but the write value

should always be 0.

5, 4

—

All 0

—

Reserved

These bits are always read as 0, and cannot be

modified.

3—

R/W

Reserved

This bit is readable/writable, but the write value

should always be 0.

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