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H8S/2224 Scheda tecnica(PDF) 856 Page - Renesas Technology Corp

Il numero della parte H8S/2224
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8S/2224 Scheda tecnica(HTML) 856 Page - Renesas Technology Corp

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Section 23 Clock Pulse Generator
Rev. 5.00 Aug 08, 2006 page 770 of 982
REJ09B0054-0500
Bit
Bit Name
Initial Value
R/W
Description
1
0
STC1
STC0
0
0
R/W
R/W
Multiplication factor setting
Specifies multiplication factor of the PLL circuit built
in the evaluation chip. The specified multiplication
factor becomes valid software standby mode, watch
mode, or subactive mode is entered.
These bits should be set to 11 in this LSI. Since the
value becomes STC1 = STC0 = 0 after a reset, set
STC1 = STC0 = 1.
00:
× 1
01:
× 2 (setting prohibited)
10:
× 4 (setting prohibited)
11: PLL is bypass
Note:
* When watch mode or subactive mode is entered, set high-speed mode.
23.2
System Clock Oscillator
System clock pulses can be supplied by connecting a crystal resonator, or by input of an external
clock.
23.2.1
Connecting a Crystal Resonator
A crystal resonator can be connected as shown in the example in figure 23.2. Select the damping
resistance Rd according to table 23.1. An AT-cut parallel-resonance crystal should be used.
EXTAL
XTAL
Rd
CL2
CL1
CL1 = CL2 = 10 to 22 pF
Note: CL1 and CL2 are reference values including the floating capacitance of the board.
Figure 23.2 Connection of Crystal Resonator (Example)



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