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H8S/2224 Scheda tecnica(PDF) 252 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 252 Page - Renesas Technology Corp |
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252 / 1071 page ![]() Section 7 Bus Controller Rev. 5.00 Aug 08, 2006 page 166 of 982 REJ09B0054-0500 Figure 7.1 shows a block diagram of the bus controller. Area decorder Bus controller ABWCR ASTCR BCRH BCRL Internal address bus External bus control signals Chip select signals BREQ BACK Internal control signals Wait controller WCRH WCRL Bus mode signal Bus arbiter DTC bus request signal DTC bus acknowledge signal CPU bus acknowledge signal DMAC bus acknowledge signal* DMAC bus request signal* CPU bus request signal WAIT Legend: ABWCR: ASTCR: WCRH: WCRL: BCRH: BCRL: Note: * Supported only by the H8S/2239 Group. Bus width control register Access state control register Wait control register H Wait control register L Bus control register H Bus control register L Figure 7.1 Block Diagram of Bus Controller |
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