H8SSLASH2224 datasheet(255/1071 Pages) RENESAS

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Section 7 Bus Controller

Rev. 5.00 Aug 08, 2006 page 169 of 982

REJ09B0054-0500

7.3.3

Wait Control Registers H and L (WCRH, WCRL)

WCRH and WCRL select the number of program wait states for each area.

Program waits are not inserted in the case of on-chip memory or internal I/O registers.

• WCRH

Bit

Bit Name

Initial Value R/W

Description

W71

W70

R/W

Area 7 Wait Control 1 and 0

These bits select the number of program wait states

when area 7 in external space is accessed while the

AST7 bit in ASTCR is set to 1.

00: Program wait not inserted when external space area

7 is accessed

01: 1 program wait state inserted when external space

area 7 is accessed

10: 2 program wait states inserted when external space

area 7 is accessed

11: 3 program wait states inserted when external space

area 7 is accessed

W61

W60

R/W

Area 6 Wait Control 1 and 0

These bits select the number of program wait states

when area 6 in external space is accessed while the

AST6 bit in ASTCR is set to 1.

00: Program wait not inserted when external space area

6 is accessed

01: 1 program wait state inserted when external space

area 6 is accessed

10: 2 program wait states inserted when external space

area 6 is accessed

11: 3 program wait states inserted when external space

area 6 is accessed

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