H8SSLASH2224 datasheet(261/1071 Pages) RENESAS

Il numero della parte	H8S/2224

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	1071 Pages

Scroll/Zoom	100%

Produttore elettronici	RENESAS [Renesas Technology Corp]

Homepage	http://www.renesas.com

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261 / 1071 page

Section 7 Bus Controller

Rev. 5.00 Aug 08, 2006 page 175 of 982

REJ09B0054-0500

7.4

Bus Control

7.4.1

Area Divisions

In advanced mode, the bus controller partitions the 16 Mbytes address space into eight areas, 7 to

0, in 2-Mbyte units, and performs bus control for external space in area units. In normal mode*, it

controls a 64-kbyte address space comprising part of area 0.

Figure 7.2 shows an outline of the memory map.

Chip select signals (

CS7 to CS0) can be output for each area.

Note: * Not availoable in this LSI.

Area 0

(2 Mbytes)

H'000000

H'FFFFFF

(1)

(2)

H'0000

H'1FFFFF

H'200000

Area 1

(2 Mbytes)

H'3FFFFF

H'400000

Area 2

(2 Mbytes)

H'5FFFFF

H'600000

Area 3

(2 Mbytes)

H'7FFFFF

H'800000

Area 4

(2 Mbytes)

H'9FFFFF

H'A00000

Area 5

(2 Mbytes)

H'BFFFFF

H'C00000

Area 6

(2 Mbytes)

H'DFFFFF

H'E00000

Area 7

(2 Mbytes)

H'FFFF

Advanced mode

Normal mode*

Note: * Not available in this LSI.

Figure 7.2 Overview of Area Divisions

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