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7480 Scheda tecnica(PDF) 54 Page - Renesas Technology Corp |
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7480 Scheda tecnica(HTML) 54 Page - Renesas Technology Corp |
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54 / 337 page ![]() 7480 Group and 7481 Group User's Manual 1-37 HARDWARE 1.10 Input/Output Pins (4) Level Shift Ports Every pin of ports P4 and P5 acts as an N-channel open-drain output and is provided with a built- in clamping diode. When voltage VI is applied to a pin through a resistor as shown in Figure 1.10.11, and the current I flowing in a clamping diode is 1 mA or less, the condition VI > VCC can be maintained. dt dv Figure 1.10.11 Port P4 and P5 Circuit Notes 1: In the 7480 Group, port P4 contains pins P40 and P41 only, while in the 7481 Group, port P4 contains pins P40–P43. In addition, the 7480 Group does not have port P5, while the 7481 Group has port P5, consisting of P50–P53. 2: Total Input Current It is required to keep the current flowing to the clamping diodes of port P4 or P5 equal to or less than 1.0 mA a pin; a current which is too large for the microcomputer can handle will raise the voltage on the power source pin. To protect the device, use an appropriate power circuit to stabilize the power source voltage within specifications. 3: Maximum Input Voltage If the input signal voltage to port P4 or P5 exceeds VCC + 0.3 V, a delay time of 2 µs/V or more is necessary immediately after the input waveform exceeds the above voltage. Delay time can be calculated by the following expression in CR integrating circuits. = ≥ 2 × 10– 6 [s/V] ∗1: Delay time t = C × R ∗2: VIN = maximum amplitude difference of input voltage 4: Clamping diodes used in the 7480 Group and 7481 Group differ from the normal switching diodes. These clamping diodes are used only for the DC signal level shifts. Therefore, sudden stress, such as a rush current must not be applied directly to the diodes. (5) Ports with Built-in Schmidt Trigger Circuits A Schmidt trigger circuit is built into every pin of ports P3, P4, and P5 of the 7481 Group. When any of port pins P42, P43, and P50–P53 is used as an input port pin, clear the corresponding bit of the port P4 and P5 direction registers to ‘0’. In addition, set the corresponding input control bit of the port P4P5 input control register to ‘1’. Note: The 7480 Group does not have pins P42, P43, and P50–P53; therefore, set the port P4P5 input control register to ‘0016’. Port P4 Port P5 I VI 7480 Group 7481 Group t∗1 0.6 × VIN∗2 |
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