7480 datasheet(91/337 Pages) RENESAS

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1-74

1.12 Timer X and Timer Y

HARDWARE

7480 Group and 7481 Group User's Manual

1.12.6 Pulse Period Measurement Mode

(1)

Operations in Pulse Period Measurement Mode

Operations in the pulse period measurement mode are explained with Figure 1.12.14.

Count Sources

In the pulse period measurement mode, timer X or timer Y can select the following count sources

with the timer X or Y count source selection bits:

• f(XIN)/2

• f(XIN)/8

• f(XIN)/16

Writes to and Reads from Timers

In the pulse period measurement mode, do not write to timers.

When a timer is read, the read value is the contents of the timer latch (measured value of the last

pulse period).

Count Operation

• When the timer X or Y stop control bit is cleared to ‘0’, the timer starts counting ( in Figure

1.12.14).

• When the timer X or Y stop control bit is set to ‘1’, the timer stops counting.

In the count operation, the contents of each timer are decremented by 1 at every rising edge of the

count source ( in Figure 1.12.14).

Reloading Timers

When a timer reaches ‘000016’ in the count operation, an underflow occurs at the subsequent rising

edge of the count source and a timer wraps around to ‘FFFF16’ ( in Figure 1.12.14).

When the valid edge of a CNTR pin input is detected in the count operation, the timer goes to

‘FFFF16’ ( in Figure 1.12.14).

Timer Interrupt

At an underflow, the timer X or Y interrupt request bit of interrupt request register 1 is set to ‘1’; then

a timer interrupt request is generated ( in Figure 1.12.14).

CNTR Interrupt

When the valid edge of a CNTR pin input is detected, the CNTR interrupt request bit of interrupt

request register 2 is set to ‘1’, and the CNTR interrupt request is generated ( in Figure 1.12.14).

The measured value of the pulse period must be read at this time.

Pulse Period Measurement

When any one of the following valid edges are detected, the complement on one of the contents of

the timer is written to the timer latch ( in Figure 1.12.14). The contents of the timer latch are

retained until the measurement of the next pulse period is complete.

• Valid edge of a CNTR0 pin input (Timer X used)

• Valid edge of a CNTR1 pin input (Timer Y used)

The measurement type of pulse period is selected by a CNTR edge selection bit of the edge polarity

selection register as follows:

• The period from a falling edge of a CNTR pin input until the next falling edge when the CNTR edge

selection bit is ‘0’ ( in Figure 1.12.14).

• The period from a rising edge of a CNTR pin input until the next rising edge when the CNTR edge

selection bit is ‘1’.

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