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7480 Group and 7481 Group User's Manual

1-40

HARDWARE

1.10 Input/Output Pins

(3)

Transition to Standby State (Note)

At the transition to the standby state, do not leave the input levels of input port pins and I/O port pins

undefined (especially pins P14, P16, P3, P4, and P5). In an N-channel open-drain I/O pin, when the

corresponding bit of the port register is ‘1’, its transistor remains in an off state even if the pin is set

to output mode with the port direction register. As a result, the pin goes to a high impedance state,

causing the level of the pin to be undefined depending on the external circuit. In such a case, a

through current flows to the gate of the input stage, so that the power source current may increase.

Note: The standby state means the following:

The stop mode by an execution of the STP instruction

The wait mode by an execution of the WIT instruction.

Actual Example

Pull a pin high (connect to VCC) or low (connect to VSS) through a resistor.

Choose a resistor taking the following into consideration:

• External circuit condition

• Variation of output levels at normal operation

Also, take account of the variation of current when pull-up transistors of ports P0 and P1 are used.

(4)

Usage of Pins P12, P13, P40, and P41 as Normal Output Pins

Pins P12 and P13 have the alternative functions of the 8-bit timer output pins T0 and T1 respectively.

Pins P40 and P41 also have the alternative functions of 16-bit timer I/O pins CNTR0 and CNTR1

respectively. When the operating mode bits of the corresponding timer are set to any mode related

to output (Note), these pins cannot operate as normal output pins. Refer to Figure 1.10.1 Block

Diagrams of Port Pins P0i and P10–P13 and Figure 1.10.3 Block Diagrams of Port Pins P2i to

P5i.

Note: Modes related to output:

For 8-bit timers (timer 1 and timer 2):

• Programmable waveform generation mode

For 16-bit timers (timer X and timer Y):

• Pulse output mode

• Programmable waveform generation mode

• Programmable one-shot output mode

• PWM mode

(5)

Usage of Port Pins P42, P43, and P50–P53 as Input Ports

When any of port pins P42, P43, and P50–P53 of the 7481 Group are used as an input port pin, clear

the corresponding bit of the port P4 and P5 direction registers to ‘0’, and set the corresponding input

control bit of the port P4P5 input control register to ‘1’.

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