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7480 Scheda tecnica(PDF) 56 Page - Renesas Technology Corp |
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7480 Scheda tecnica(HTML) 56 Page - Renesas Technology Corp |
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56 / 337 page ![]() 7480 Group and 7481 Group User's Manual 1-39 HARDWARE 1.10 Input/Output Pins 1.10.5 Notes on Usage Pay attention to the following notes when the I/O ports are used. (1) Rewriting to Port Register of I/O Port Rewriting to the port register of an I/O port with a bit manipulation instruction∗1 may affect the values of the bits not specified. ∗1: ‘Bit manipulation instructions’: the CLB and SEB instructions REASON: The bit manipulation instructions are read-modify-write instructions. These instructions read and write data by the byte. Therefore when these instructions are executed for any one bit of the port register of an I/O port, the following processing is performed to all of the bits of the register: • For bits that are set to the input mode, the states of the corresponding pins are read into the CPU, and after the bit manipulation, the bits of the port register are rewritten. • For bits that are set to the output mode, the values of the port latches are read into the CPU, and after the bit manipulation, the bits of the port register are rewritten. Pay attention also to the following: • Even if a port pin set to the output mode is switched to the input mode, output data is retained in the port register. • When the state of a port pin and the content of the corresponding bit of the port register are different, the content of the bit of the port register set to the input mode may be affected even if this bit is not specified by a bit manipulation instruction. (2) Pull-up Control of Ports P0 and P1 When any of pins P15–P17 is used as a serial I/O pin, the pull-up control of the pin is invalid. (The pin cannot be pulled high.) For details, refer to Figure 1.10.2 Block Diagram of Port Pins P14–P17. When any pin of ports P0 and P1 is used as an output port pin, the pull-up control of the pin is invalid. (The pin cannot be pulled high.) For details, refer to Figure 1.10.1 Block Diagrams of Port Pins P0i and P10–P13 and Figure1.10.2 Block Diagram of Port Pins P14–P17. Port P1 controls pull-up the high- or low-order four bits at one time. Even if only port P10 pin is pulled high, for example, port pins P11–P13 are pulled high simultaneously. |
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