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1.12 Timer X and Timer Y

HARDWARE

7480 Group and 7481 Group User's Manual

1.12.4 Timer Mode and Event Count Mode

(1)

Operations in Timer Mode and Event Count Mode

Operations in the timer mode and the event count mode are explained with Figure 1.12.8.

Count Sources

In the timer mode and the event count mode, timer X or timer Y can select the following count

sources with the timer X or Y count source selection bits:

• f(XIN)/2

• f(XIN)/8

timer mode

• f(XIN)/16

• CNTR0 pin input (Timer X used)

• CNTR1 pin input (Timer Y used)

Notes 1: In the event count mode, the inverted signal of input to a CNTR pin is used as the count

source when a CNTR edge selection bit of the edge polarity selection register is ‘1’.

2: In the event count mode, keep the frequency of the CNTR pin input used as the count

source f(XIN)/4 or less.

Writes to and Reads from Timers

When ‘TL (000016 through FFFF16)’ is written to a timer, the following different operations are

performed depending on the state of the timer X or Y write control bit:

• In the ‘0’ state of the timer X or Y write control bit, the ‘TL’ is set in both the timer latch and the

timer ( in Figure 1.12.8).

• In the ‘1’ state of the timer X or Y write control bit, the ‘TL’ is set in the timer latch only.

Also, the contents of the timer can be read by a read operation.

Count Operation

• When the timer X or Y stop control bit of the timer XY control register is cleared to ‘0’, the timer

starts counting ( in Figure 1.12.8).

• When the timer X or Y stop control bit is set to ‘1’, the timer stops counting ( in Figure 1.12.8).

In the count operation, the contents of each timer are decremented by 1 at every rising edge of the

count source ( in Figure 1.12.8).

Reloading Timers

When a timer reaches ‘000016’ in the count operation, an underflow occurs at the subsequent rising

edge of the count source, and the contents of the timer latch are reloaded to the timer ( in Figure

1.12.8).

Timer Interrupt

At an underflow, the timer X or Y interrupt request bit is set to ‘1’; then a timer interrupt request is

generated ( in Figure 1.12.8).

event count mode

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