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7480 Scheda tecnica(PDF) 194 Page - Renesas Technology Corp |
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7480 Scheda tecnica(HTML) 194 Page - Renesas Technology Corp |
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194 / 337 page ![]() 7480 Group and 7481 Group User's Manual 1-177 HARDWARE 1.20 Built-in PROM Version 1.20.3 Reading, Programming and Erasing of Built-in PROM The built-in PROM version can be used in the EPROM mode by setting the RESET pin to LOW. Reading, programming, and erasing of the built-in PROM in the EPROM mode are described below. Also, Table 1.20.5 lists the I/O signals in the EPROM mode. (1) Reading from Built-in PROM • 0 V is applied to the RESET pin, and 5 V to the VCC pin. • Address signals (A0–A14) are input, and the OE and the CE pins are set to LOW. Then, the contents of PROM are placed on data I/O pins (D0–D7). • The CE or the OE pins are set to HIGH. Then, data I/O pins (D0–D7) float. (2) Programming into Built-in PROM • 0 V is applied to the RESET pin, and 5 V to the VCC pin. • The OE pin is set to HIGH and VPP is applied to the VPP pin. Then, the CPU enters the program mode. • Addresses are set to address input pins (A0–A14), and the 8-bit data to be programmed is placed in parallel, on data I/O pins (D0–D7). • Setting the CE pin to LOW starts programming. Specify addresses 400016 through 7FFF16 when programming with the PROM programmer. Also, set all addresses 000016 through 3FFF16 to ‘FF16’ when programming into addresses 000016 through 7FFF16. (3) Erasing • Only the built-in EPROM version with a window (M37481E8SS) is erasable. • The EPROM can be erased when exposed to ultraviolet light with a wavelength of 2537 Å. • Integrated dose necessary for erasure is a minimum of 15 W•s/cm2. Table 1.20.5 I/O Signals in EPROM Mode OE VIL VIH VIH VIL VIH CE VIL VIL VIL VIH VIH VPP VCC VCC VPP VPP VPP VCC VCC RESET 0 V D0–D7 Output Floating Input Output Floating Pin name Mode Read Output disable Write Write-verify Write disable Note: VIL represents the LOW input voltage, and VIH, the HIGH input voltage. |
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