7480 datasheet(267/337 Pages) RENESAS

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3-2

3.1 Control Registers

APPENDICES

7480 Group and 7481 Group User's Manual

3.1 Control Registers

Figure 3.1.1 Port Pi Registers (i = 0 to 5)

Figure 3.1.2 Port Pi Direction Registers (i = 0, 1, 4, 5)

Port Pi (i=0 to 5)

b4 b3 b2 b1 b0

Function

Port Pi (Pi, i=0 to 5) [Addresses 00C016,00C216,00C416,00C616,00C816,00CA16]

Note: • In the 7480 Group, port P2 has only bits 0 to 3. The other bits are not implemented. (undefined at reading).

When used as input ports (Ports P0 to P5)

• At reading, input level of pin is read.

• At writing, writing to port latch is performed and

the pin state is not affected.

When used as output ports (Ports P0, P1, P4, P5)

• At reading, the last written value into the port latch is

read.

• At writing, the written value is output externally through

a transistor.

At reset

Undefined

• Port P3 has only bits 0 to 3. The other bits are not implemented (‘0’ at reading).

• In the 7480 Group, port P4 has only bits 0 and 1. In the 7481 Group, port P4 has only bits 0 to 3.

The other bits are not implemented. (bits 4 to 7: ‘0’ at reading, bits 2 and 3 in the 7480 Group: undefined).

• The 7480 Group does not have port P5. In the 7481 Group, port P5 has only bits 0 to 3.

The other bits are not implemented. (‘0’ at reading).

Port Pi direction register (i=0,1,4,5)

b4 b3 b2 b1 b0

Name

Function

At reset

Port Pi direction register (PiD, i=0,1,4,5) [Addresses 00C116,00C316,00C916,00CB16]

Port Pi direction register (Note)

0 : Input mode

1 : Output mode

Note: • In the 7480 Group, port P4 direction register has only bits 0 and 1. In the 7481 Group, port P4 direction register

has only bits 0 to 3. The other bits are not implemented (bits 4 to 7: ‘0’ at reading, bits 2 and 3 in the 7480 Group:

undefined).

• The 7480 Group does not have port P5 direction register. In the 7481 Group, port P5 has only bits 0 to 3.

The other bits are not implemented (‘0’ at reading).

0 : Input mode

1 : Output mode

0 : Input mode

1 : Output mode

0 : Input mode

1 : Output mode

0 : Input mode

1 : Output mode

0 : Input mode

1 : Output mode

0 : Input mode

1 : Output mode

0 : Input mode

1 : Output mode

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