ATtiny261-ESSZ datasheet(120/227 Pages) ATMEL

120 / 227 page

120

7753C–AVR–07/09

ATtiny261/ATtiny461/ATtiny861

• Bits 5,4 - COM1B1S, COM1B0S: Comparator B Output Mode, Bits 1 and 0

These bits are the shadow bits of the COM1A1 and COM1A0 bits that are described in the sec-

tion “TCCR1A – Timer/Counter1 Control Register A” on page 115.

• Bits 3,2 - COM1D1, COM1D0: Comparator D Output Mode, Bits 1 and 0

These bits control the Behavior of the Waveform Output (OCW1D) and the connection of the

Output Compare pin (OC1D). If one or both of the COM1D1:0 bits are set, the OC1D output

overrides the normal port functionality of the I/O pin it is connected to. The complementary

OC1D output is connected only in PWM modes when the COM1D1:0 bits are set to “01”. Note

that the Data Direction Register (DDR) bit corresponding to the OC1D pin must be set in order to

enable the output driver.

The function of the COM1D1:0 bits depends on the PWM1D and WGM10 bit settings. Table

16-16 shows the COM1D1:0 bit functionality when the PWM1D bit is set to a Normal Mode

(non-PWM).

Table 16-17 shows the COM1D1:0 bit functionality when the PWM1D and WGM10 bits are set

to Fast PWM Mode.

Table 16-18 on page 121 shows the COM1D1:0 bit functionality when the PWM1D and WGM10

bits are set to Phase and Frequency Correct PWM Mode.

Table 16-16. Compare Output Mode, Normal Mode (non-PWM)

COM1D1..0

OCW1D Behavior

OC1D Pin

Normal port operation.

Disconnected

Toggle on Compare Match.

Connected

Disconnected

Clear on Compare Match.

Connected

Disconnected

Set on Compare Match.

Connected

Disconnected

Table 16-17. Compare Output Mode, Fast PWM Mode

COM1D1..0

OCW1D Behavior

OC1D Pin

Normal port operation.

Disconnected

Cleared on Compare Match.

Set when TCNT1 = 0x000.

Connected

Cleared on Compare Match.

Set when TCNT1 = 0x000.

Connected

Disconnected

Set on Compare Match.

Clear when TCNT1 = 0x000.

Connected

Disconnected

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