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ATtiny261-ESSZ Scheda tecnica(PDF) 123 Page - ATMEL Corporation |
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ATtiny261-ESSZ Scheda tecnica(HTML) 123 Page - ATMEL Corporation |
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123 / 227 page ![]() 123 7753C–AVR–07/09 ATtiny261/ATtiny461/ATtiny861 The actual value from the port register will be visible on the port pin, when the Output Compare Override Enable Bit is cleared. Table 16-20 shows the Output Compare Override Enable Bits and their corresponding Output Compare pins. 16.11.6 TCNT1 – Timer/Counter1 This 8-bit register contains the value of Timer/Counter1. The Timer/Counter1 is realized as a 10-bit up/down counter with read and write access. Due to synchronization of the CPU, Timer/Counter1 data written into Timer/Counter1 is delayed by one and half CPU clock cycles in synchronous mode and at most one CPU clock cycles for asyn- chronous mode. When a 10-bit accuracy is preferred, special procedures must be followed for accessing the 10-bit TCNT1 register via the 8-bit AVR data bus. These procedures are described in section “Accessing 10-Bit Registers” on page 112. Alternatively the Timer/Counter1 can be used as an 8-bit Timer/Counter. Note that the Timer/Counter1 always starts counting up after writing the TCNT1 register. 16.11.7 TC1H – Timer/Counter1 High Byte The temporary Timer/Counter1 register is an 2-bit read/write register. • Bits 7:2 - Res: Reserved Bits These bits are reserved bits in the ATtiny261/461/861 and always reads as zero. • Bits 1:0 - TC19, TC18: Two MSB bits of the 10-bit accesses If 10-bit accuracy is used, the Timer/Counter1 High Byte Register (TC1H) is used for temporary storing the MSB bits (TC19, TC18) of the 10-bit accesses. The same TC1H register is shared between all 10-bit registers within the Timer/Counter1. Note that special procedures must be fol- lowed when accessing the 10-bit TCNT1 register via the 8-bit AVR data bus. These procedures are described in section “Accessing 10-Bit Registers” on page 112. Table 16-20. Output Compare Override Enable Bits vs. Output Compare Pins OC1OE0 OC1OE1 OC1OE2 OC1OE3 OC1OE4 OC1OE5 OC1A (PB0) OC1A (PB1) OC1B (PB2) OC1B (PB3) OC1D (PB4) OC1D (PB5) Bit 76543210 0x2E (0x4E) MSB LSB TCNT1 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial value 00000000 Bit 76543210 0x25 (0x45) ------ TC19 TC18 TC1H Read/Write RRRRRR R/W R/W Initial value 00000000 |
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