AM186EM-33VCSLASHW datasheet(34/98 Pages) AMD

34 / 98 page

Am186/188EM and Am186/188EMLV Microcontrollers

PRELIMINA R Y

FUNCTIONAL DESCRIPTION

AMD’s Am186 and Am188 family of microcontrollers

and microprocessors is based on the architecture of

the original 8086 and 8088 microcontrollers and cur-

rently includes the 80C186, 80C188, 80L186, 80L188,

Am186EM, Am188EM, Am186EMLV, Am188EMLV,

Am186ES, Am188ES, Am186ESLV, Am188ESLV,

Am186ER, and Am188ER microcontrollers.

All family members contain the same basic set of

registers, instructions, and addressing modes and are

compatible with the industry-standard 80C186/188

microcontrollers.

A full description of all the Am186EM and Am188EM

microcontroller registers is included in the

Am186EM

and Am188EM Microcontrollers User’s Manual, order#

19713. The instruction set for the Am186EM and

Am188EM microcontrollers is documented in the

Am186

and Am188 Family Instruction Set Manual, order# 21267.

Memory Organization

Memory is organized in sets of segments. Each seg-

ment is a linear contiguous sequence of 64K (216) 8-bit

bytes. Memory is addressed using a two-component

address that consists of a 16-bit segment value and a

16-bit offset. The 16-bit segment values are contained

in one of four internal segment registers (CS, DS, SS,

or ES). The physical address is calculated by shifting

the segment value left by 4 bits and adding the 16-bit

offset value to yield a 20-bit physical address (see Figure 3).

This allows for a 1-Mbyte physical address size.

All instructions that address operands in memory must

specify the segment value and the 16-bit offset value.

For speed and compact instruction encoding, the seg-

ment register used for physical address generation is

implied by the addressing mode used (see Table 5).

Figure 2.

Two-Component Address

I/O Space

The I/O space consists of 64K 8-bit or 32K 16-bit ports.

Separate instructions (IN, INS and OUT, OUTS) ad-

dress the I/O space with either an 8-bit port address

specified in the instruction, or a 16-bit port address in

the DX register. Eight-bit port addresses are zero-ex-

tended so that A15–A8 are Low. I/O port addresses

00F8h through 00FFh are reserved. The Am186EM

and Am188EM microcontrollers provide specific in-

structions for addressing I/O space.

Table 5.

Segment Register Selection Rules

Segment

Base

Logical

Address

Shift

Left

4 Bits

Physical Address

To Memory

Offset

Memory Reference

Needed

Segment Register

Used

Implicit Segment Selection Rule

Instructions

Code (CS)

Instructions (including immediate data)

Local Data

Data (DS)

All data references

Stack

Stack (SS)

All stack pushes and pops;

any memory references that use BP Register

External Data (Global)

Extra (ES)

All string instruction references that use the DI Register as an index

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