Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

AM186EM-33VC/W Scheda tecnica(PDF) 69 Page - Advanced Micro Devices

Il numero della parte AM186EM-33VC/W
Spiegazioni elettronici  High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers
PDF  98 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  AMD [Advanced Micro Devices]
Homepage  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM186EM-33VC/W Scheda tecnica(HTML) 69 Page - Advanced Micro Devices

Back Button AM186EM-33VC/W Datasheet HTML 65Page - Advanced Micro Devices AM186EM-33VC/W Datasheet HTML 66Page - Advanced Micro Devices AM186EM-33VC/W Datasheet HTML 67Page - Advanced Micro Devices AM186EM-33VC/W Datasheet HTML 68Page - Advanced Micro Devices AM186EM-33VC/W Datasheet HTML 69Page - Advanced Micro Devices AM186EM-33VC/W Datasheet HTML 70Page - Advanced Micro Devices AM186EM-33VC/W Datasheet HTML 71Page - Advanced Micro Devices AM186EM-33VC/W Datasheet HTML 72Page - Advanced Micro Devices AM186EM-33VC/W Datasheet HTML 73Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 69 / 98 page
background image
Am186/188EM and Am186/188EMLV Microcontrollers
69
P R E L IMINAR Y
SWITCHING CHARACTERISTICS over COMMERCIAL operating range
PSRAM Read Cycle (20 MHz and 25 MHz)
Notes:
All timing parameters are measured at 1.5 V with 50 pF loading on CLKOUTA unless otherwise noted. All output test conditions
are with CL = 50 pF. For switching tests, VIL = 0.45 V and VIH = 2.4 V, except at X1 where VIH = VCC – 0.5 V.
a
Equal loading on referenced pins.
b
If either spec 2 or spec 59 is met with respect to data hold time, the part will function correctly.
Preliminary
Parameter
20 MHz
25 MHz
No.
Symbol
Description
Min
Max
Min
Max
Unit
General Timing Requirements
1
tDVCL
Data in Setup
10
10
ns
2
tCLDX
Data in Hold(b)
3
3
ns
General Timing Responses
5
tCLAV
AD Address Valid Delay and BHE
0
25
0
20
ns
7
tCLDV
Data Valid Delay
0
25
0
20
ns
8
tCHDX
Status Hold Time
0
0
ns
9
tCHLH
ALE Active Delay
25
20
ns
10
tLHLL
ALE Width
tCLCL–10=
40
tCLCL–10=
30
ns
11
tCHLL
ALE Inactive Delay
25
20
ns
23
tLHAV
ALE High to Address Valid
20
15
ns
80
tCLCLX
LCS Inactive Delay
0
25
0
20
ns
81
tCLCSL
LCS Active Delay
0
25
0
20
ns
84
tLRLL
LCS Precharge Pulse Width
tCLCL + tCLCH
–3
tCLCL + tCLCH
–3
ns
Read Cycle Timing Responses
24
tAZRL
AD Address Float to RD Active
0
0
ns
25
tCLRL
RD Active Delay
0
25
0
20
ns
26
tRLRH
RD Pulse Width
2tCLCL–15
=85
2tCLCL–15
=65
ns
27
tCLRH
RD Inactive Delay
0
25
0
20
ns
28
tRHLH
RD Inactive to ALE High(a)
tCLCH–3
tCLCH–3
ns
59
tRHDX
RD High to Data Hold on AD Bus(b)
0
0
ns
66
tAVRL
A Address Valid to RD Low
2tCLCL–15
=85
2tCLCL–15
=65
ns
68
tCHAV
CLKOUTA High to A Address Valid
0
25
0
20
ns



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com