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F4MP Scheda tecnica(PDF) 9 Page - NXP Semiconductors |
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F4MP Scheda tecnica(HTML) 9 Page - NXP Semiconductors |
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9 / 37 page ![]() PTN3355 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 3.1 — 4 November 2016 9 of 37 NXP Semiconductors PTN3355 Low power DP to VGA adapter with integrated 1 : 2 VGA switch [1] Byte fields that are not explicitly listed are by definition reserved (‘RES’) and their default value is 0h. [2] Example only. Firmware number changes as firmware updated. Remark: If necessary, the DDC bus speed control can be done via I2C-bus interface. For any requirement to change DDC bus speed, contact NXP. Link Configuration Field 00109h I2C-bus speed control capabilities bit map. Speed control is not supported and the default speed of 50 kbit/s is supported. Writes are ignored and reads would get zeros. 00h read/write 0010Ah Bit 0 = ALTERNATE_SCRAMBLER_RESET_ENABLE. Source sets to 1 to select the alternate scrambler reset. Writes ignored if ALTERNATE_SCRAMBLER_RESET_CAPABLE = 0. Power-on default value = 0. Bit 1 = FRAMING_CHANGE_ENABLE. Source sets to 1 to select the framing change. Writes ignored if FRAMING_CHANGE_CAPABLE = 0. Power-on default value = 0. Bits 6:2 = reserved. Read all zeros. Bit 7 = PANEL_SELF_TEST_ENABLE (not supported in PTN3355). 00h read/write Branch device specific field 00500h BRANCH_IEEE_OUI 7:0 Branch vendor 24-bit IEEE OUI. NXP OUI = 00 00h read only 00501h BRANCH_IEEE_OUI 15:8 NXP OUI = 60 60h read only 00502h BRANCH_IEEE_OUI 23:16 NXP OUI = 37 37h read only 00503h ID string = 3355N2 33h read only 00504h 33h read only 00505h 55h read only 00506h 55h read only 00507h 4Eh read only 00508h 32h read only 00509h Hardware revision level v1.1 10h read only 0050Ah Firmware/software major revision level 01h[2] read only 0050Bh Firmware/software minor revision level 00h[2] read only 0050Ch to 005FFh RESERVED read only Table 4. PTN3355 specific DPCD registers …continued DPCD register [1] Description Power-on Reset value Read/write over AUX CH |
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