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FS23 Scheda tecnica(PDF) 120 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 120 Page - NXP Semiconductors |
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120 / 230 page  NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Bit Symbol Description Lock the device in INIT phase 0 Exit INIT phase is possible 1 Device locked in INIT phase 10 LOCK_INIT POR, or clear on write (write '1') Report a POR of the digital POR = VBOS_POR or VDIG_UV_POR or VDIG_OV_POR or SOFTPOR_REQ 0 No POR event 1 Digital POR event occurred 12 POR POR Report battery failure event (not reset by SOFTPOR_REQ) BAT_FAIL = VBOS_POR or VDIG_UV_POR or VDIG_OV_POR 0 No battery failure event 1 Battery failure event occurred 14 BAT_FAIL HARD_POR Table 84. M_SYS_CFG register bit description...continued 22.6 M_SYS1_CFG Bit 15 14 13 12 11 10 9 8 Write - - - VBOS2V1_SW_ ALWAYS_EN - LOAD_ OTP_BYP SLOT_BYP TSLOT_ DOWN_CFG Read 0 0 0 VBOS2V1_SW_ ALWAYS_EN 0 LOAD_ OTP_BYP SLOT_BYP TSLOT_ DOWN_CFG Reset 0 0 0 OTP fuse 0 0 OTP fuse 0 Bit 7 6 5 4 3 2 1 0 Write - SOFTPOR_REQ - DBG_EXIT - - OTP_EXIT - Read 0 0 0 0 DBG_MODE 0 0 OTP_MODE Reset 0 0 0 0 0 0 0 0 Table 85. M_SYS1_CFG register bit allocation Bit Symbol Description Real-time status of OTP mode 0 Device is not in OTP mode 1 Device is in OTP mode 0 OTP_MODE Real-time information Exit OTP mode 0 No action 1 Exit OTP mode 1 OTP_EXIT POR, self-clear Real-time status of Debug mode 0 Device is not in Debug mode 1 Device is in Debug mode 3 DBG_MODE Real-time information Exit Debug mode 0 No action 1 Exit Debug mode 4 DBG_EXIT POR, self-clear Table 86. M_SYS1_CFG register bit description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 120 / 230 |
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