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FS23 Scheda tecnica(PDF) 124 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 124 Page - NXP Semiconductors |
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124 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Bit Symbol Description Report V2 thermal shutdown event 0 No event detected 1 V2 TSD occurred 11 V2TSD_I POR, or clear on write (write '1') Report V1 thermal shutdown event 0 No event detected 1 V1 TSD occurred 12 V1TSD_I POR, or clear on write (write '1') Report V1 temperature warning event 0 No event detected 1 die V1 TWARN occurred 13 V1TWARN_I POR, or clear on write (write '1') Report VMON_EXT overvoltage event 0 No event detected 1 VMON_EXT OV occurred 14 V0OV_I POR, or clear on write (write '1') Report VMON_EXT undervoltage event 0 No event detected 1 VMON_EXT UV occurred 15 V0UV_I POR, or clear on write (write '1') Table 90. M_REG_FLG register bit description...continued 22.9 M_REG_MSK Bit 15 14 13 12 11 10 9 8 Write V0UV_M V0OV_M V1TWARN_M V1TSD_M V2TSD_M V3TSD_M V2OL_M V1UV_M Read V0UV_M V0OV_M V1TWARN_M V1TSD_M V2TSD_M V3TSD_M V2OL_M V1UV_M Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write V2UV_M V3UV_M V1OV_M V2OV_M V3OV_M V1OC_M V2OC_M V3OC_M Read V2UV_M V3UV_M V1OV_M V2OV_M V3OV_M V1OC_M V2OC_M V3OC_M Reset 0 0 0 0 0 0 0 0 Table 91. M_REG_MSK register bit allocation Bit Symbol Description Inhibit V3 overcurrent interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 0 V3OC_M POR Inhibit V2 overcurrent interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 1 V2OC_M POR Table 92. M_REG_MSK register bit description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 124 / 230 |
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