R34DS0017EU0104 Rev.1.04

Page 13

Jan 31, 2025

ISL73041SEH Datasheet

PWM Enter Mid-Level to

UG Low Delay Time

tPDUG1

PWM [High to Mid] to UG Falling;

RDU= RDL = 1.3kΩ

-55 to

+125°C

-80

-

ns

PWM Exit Mid-Level to

UG High Delay Time

tPDUG2

PWM [Mid to High] to UG Rising;

RDU = RDL = 1.3kΩ

-65

-

ns

PWM Enter Mid-Level to

LG Low Delay Time

tPDLG1

PWM [Low to Mid] to LG Falling;

RDU= RDL = 1.3kΩ

-80

-

ns

PWM Exit Mid-Level to

LG Rising Delay Time

tPDLG2

PWM [Mid to Low] to LG Rising;

RDU= RDL = 1.3kΩ

-65

-

ns

UG and LG Transition Times

UG Rise Time

tUGR

VDD = 4.75V;

PVCC = BOOT-PHS = 4.5V;

UG CLOAD = 5nF; 10% to 90%

-55 to

+125°C

--

29

ns

VDD = 4.75V;

PVCC = BOOT-PHS = 4.5V;

UG CLOAD = 470nF; 30% to 70%

-55°C

340

470

620

+25°C

410

530

680

+125°C

480

660

740

+25°C

(Post Rad)

340

540

740

UG Fall Time

tUGF

VDD = 4.75V;

PVCC = BOOT-PHS = 4.5V;

UG CLOAD = 5nF; 90% to 10%

-55 to

+125°C

--

26

ns

VDD = 4.75V;

PVCC = BOOT-PHS = 4.5V;

UG CLOAD = 470nF; 70% to 30%

-55°C

200

260

330

+25°C

220

280

360

+125°C

260

330

420

+25°C

(Post Rad)

200

290

420

LG Rise Time

tLGR

VDD = 4.75V;

PVCC = BOOT-PHS = 4.5V;

LG CLOAD = 10nF; 10% to 90%

-55 to

+125°C

--

36

ns

VDD = 4.75V;

PVCC = BOOT-PHS = 4.5V;

LG CLOAD = 940nF; 30% to 70%

-55°C

440

550

640

+25°C

470

620

800

+125°C

600

770

950

+25°C

(Post Rad)

440

630

950

Unless otherwise specified: VDD = 13.2V; EN = VDD; PVCC = 5.5V; CPVCC = 2.2µF; CAVCC = 2.2µF; CBOOT = 100nF to PHS;

PHS = PGND = 0V, TA=25°C. UG is defined as UGH = UGL. LG is defined as LGH = LGL. Boldface specifications apply across

the operating temperature range from TA= -55°C to +125°C and across a total ionizing dose of 75krad(Si) at +25°C with

exposure at a low dose rate of <10mrad(Si)/s.

Parameter

Symbol

Test Conditions

Temp.

Min[1]

Typ[2]

Max[1]

Unit